Product Summary

The MB86H46APBS-M-AE1 is designed as one kind of integrated MPEG-2 settop- box decoder which includes the hardware extensions required to support the NDS cond-itional access system. This device is one member of the Fujitsu’s MPEG decoder family which include an ARC RISC CPU (at 130.5MHz), two transport stream demultiplexers with integrated DVB descramblers, a PAL/ NTSC/SECAM digital video encoder and a display controller.

Parametrics

MB86H46APBS-M-AE1 specifications: (1)Bit Rate of Audio: 30Mbps(max.); (2)Interface of Audio: SMPTE 274M/SMPTE296M-2001, ITU-R BT.656, External sync mode (H/V/F + 16-bit data); (3)Format of Audio: Dolby Digital (AC-3)*2, MPEG-2/4 AAC (LC profile), MPEG-1 Audio Layer 2, Linear PCM; (4)Channels of Audio: Max. 5.1ch*3; (5)Interface of Audio: I2S, S/PDIF; (6)Format of System: ISO/IEC13818-1 + Amd3 (MPEG-2 TS), Video/Audio ES output; (7)Interface of System: 8-bit parallel, Serial, PCI; (8)Host Interface: General 16-bit parallel, Serial, PCI; (9)Peripheral: I/O SPI; (10)Input Clock Frequency: 27MHz; (11)Operating Frequency: 189MHz (internal memory interface only: 189MHz); (12)Power Consumption: 850mW (1.2V, 1920x1080x60p at encoding); (13)Package: FBGA 650pin 15mm square SiP (Ball pitch 0.5mm); (14)Memory: 512Mbit FCRAM x 1.

Features

MB86H46APBS-M-AE1 features: (1)Small form-factor, low power consumption necessary for portable devices; (2)Processing at 60p further improves picture quality (MB86H46); (3)Both devicess feature embedded Up/Down scaler; (4)Improved connectivity to peripheral devices.

Diagrams

MB86H46APBS-M-AE1 circuit diagram

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